[llvm] 03141aa - [ARM] Enable outliner at -Oz for M-class

[Sam Parker via llvm-commits]

Author: Sam Parker
Date: 2020-08-27T08:02:56+01:00
New Revision: 03141aa04acb2481652125c974bf3cfd125f4ce9

URL: https://github.com/llvm/llvm-project/commit/03141aa04acb2481652125c974bf3cfd125f4ce9
DIFF: https://github.com/llvm/llvm-project/commit/03141aa04acb2481652125c974bf3cfd125f4ce9.diff

LOG: [ARM] Enable outliner at -Oz for M-class

Enable default outlining when the function has the minsize attribute
and we're targeting an m-class core.

Differential Revision: https://reviews.llvm.org/D82951

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/lib/Target/ARM/ARMTargetMachine.cpp
    llvm/test/CodeGen/ARM/O3-pipeline.ll
    llvm/test/CodeGen/ARM/machine-outliner-tail.ll
    llvm/test/CodeGen/ARM/machine-outliner-thunk.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 48460ab68b62..dd7b520effa8 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -6129,3 +6129,8 @@ MachineBasicBlock::iterator ARMBaseInstrInfo::insertOutlinedCall(
   It--;
   return CallPt;
 }
+
+bool ARMBaseInstrInfo::shouldOutlineFromFunctionByDefault(
+    MachineFunction &MF) const {
+  return Subtarget.isMClass() && MF.getFunction().hasMinSize();
+}

diff  --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
index 9ddd92824683..53c627c20934 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -372,6 +372,9 @@ class ARMBaseInstrInfo : public ARMGenInstrInfo {
                      MachineBasicBlock::iterator &It, MachineFunction &MF,
                      const outliner::Candidate &C) const override;
 
+  /// Enable outlining by default at -Oz.
+  bool shouldOutlineFromFunctionByDefault(MachineFunction &MF) const override;
+
 private:
   /// Returns an unused general-purpose register which can be used for
   /// constructing an outlined call if one exists. Returns 0 otherwise.

diff  --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index b316b1041f2c..242fd706ca6c 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -251,7 +251,7 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT,
 
   // ARM supports the MachineOutliner.
   setMachineOutliner(true);
-  setSupportsDefaultOutlining(false);
+  setSupportsDefaultOutlining(true);
 }
 
 ARMBaseTargetMachine::~ARMBaseTargetMachine() = default;

diff  --git a/llvm/test/CodeGen/ARM/O3-pipeline.ll b/llvm/test/CodeGen/ARM/O3-pipeline.ll
index f137f715ee42..27cc1d3d6b45 100644
--- a/llvm/test/CodeGen/ARM/O3-pipeline.ll
+++ b/llvm/test/CodeGen/ARM/O3-pipeline.ll
@@ -170,6 +170,8 @@
 ; CHECK-NEXT:      Contiguously Lay Out Funclets
 ; CHECK-NEXT:      StackMap Liveness Analysis
 ; CHECK-NEXT:      Live DEBUG_VALUE analysis
+; CHECK-NEXT:    Machine Outliner
+; CHECK-NEXT:    FunctionPass Manager
 ; CHECK-NEXT:      MachineDominator Tree Construction
 ; CHECK-NEXT:      ARM constant island placement and branch shortening pass
 ; CHECK-NEXT:      MachineDominator Tree Construction

diff  --git a/llvm/test/CodeGen/ARM/machine-outliner-tail.ll b/llvm/test/CodeGen/ARM/machine-outliner-tail.ll
index baf419c47871..30355988e856 100644
--- a/llvm/test/CodeGen/ARM/machine-outliner-tail.ll
+++ b/llvm/test/CodeGen/ARM/machine-outliner-tail.ll
@@ -7,6 +7,8 @@
 ; RUN: | FileCheck %s --check-prefix=MACHO
 ; RUN: llc -enable-machine-outliner -verify-machineinstrs -mtriple=thumbv5-- \
 ; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB1
+; RUN: llc -verify-machineinstrs -mtriple=thumbv8m.main \
+; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB
 
 ; ARM-LABEL: name:            OUTLINED_FUNCTION_0
 ; ARM: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
@@ -31,7 +33,7 @@
 
 ; THUMB1-NOT: OUTLINED_FUNCTION_0
 
-define void @a() {
+define void @a() #0 {
 entry:
   tail call void @z(i32 1, i32 2, i32 3, i32 4)
   ret void
@@ -39,8 +41,10 @@ entry:
 
 declare void @z(i32, i32, i32, i32)
 
-define dso_local void @b(i32* nocapture readnone %p) {
+define dso_local void @b(i32* nocapture readnone %p) #0 {
 entry:
   tail call void @z(i32 1, i32 2, i32 3, i32 4)
   ret void
 }
+
+attributes #0 = { minsize optsize }

diff  --git a/llvm/test/CodeGen/ARM/machine-outliner-thunk.ll b/llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
index e3f2ffa08f54..807e16202f2c 100644
--- a/llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
+++ b/llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
@@ -7,10 +7,12 @@
 ; RUN: | FileCheck %s --check-prefix=MACHO
 ; RUN: llc -enable-machine-outliner -verify-machineinstrs -mtriple=thumbv5-- \
 ; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB1
+; RUN: llc -verify-machineinstrs -mtriple=thumbv8m.main \
+; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB
 
 declare i32 @thunk_called_fn(i32, i32, i32, i32)
 
-define i32 @a() {
+define i32 @a() #0 {
 ; ARM-LABEL: name:             a
 ; ARM:       bb.0.entry:
 ; ARM-NEXT:    liveins: $r11, $lr
@@ -52,7 +54,7 @@ entry:
   ret i32 %cx
 }
 
-define i32 @b() {
+define i32 @b() #0 {
 ; ARM-LABEL: name:             b
 ; ARM:       bb.0.entry:
 ; ARM-NEXT:    liveins: $r11, $lr
@@ -117,3 +119,5 @@ entry:
 ; MACHO-NEXT:   $r2, dead $cpsr = tMOVi8 3, 14 /* CC::al */, $noreg
 ; MACHO-NEXT:   $r3, dead $cpsr = tMOVi8 4, 14 /* CC::al */, $noreg
 ; MACHO-NEXT:   tTAILJMPd @thunk_called_fn, 14 /* CC::al */, $noreg, implicit $sp
+
+attributes #0 = { minsize optsize }