[llvm] 9cea682 - [VectorCombine] adjust test for better coverage; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2020-08-26T16:52:48-04:00
New Revision: 9cea682faaa097e15891b945e74e7a8fdb4d7069

URL: https://github.com/llvm/llvm-project/commit/9cea682faaa097e15891b945e74e7a8fdb4d7069
DIFF: https://github.com/llvm/llvm-project/commit/9cea682faaa097e15891b945e74e7a8fdb4d7069.diff

LOG: [VectorCombine] adjust test for better coverage; NFC

A >2x insert might crash if we do not generate the shuffle mask carefully.

D86160

Added: 
    

Modified: 
    llvm/test/Transforms/VectorCombine/X86/load.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/VectorCombine/X86/load.ll b/llvm/test/Transforms/VectorCombine/X86/load.ll
index 104c8c2d025fa..e24ffb8da66f2 100644
--- a/llvm/test/Transforms/VectorCombine/X86/load.ll
+++ b/llvm/test/Transforms/VectorCombine/X86/load.ll
@@ -376,15 +376,15 @@ define <8 x i32> @casted_load_i32_insert_v8i32(<4 x i32>* align 4 dereferenceabl
 
 ; TODO: Should load v4f32.
 
-define <8 x float> @load_f32_insert_v8f32(float* align 16 dereferenceable(16) %p) {
-; CHECK-LABEL: @load_f32_insert_v8f32(
+define <16 x float> @load_f32_insert_v16f32(float* align 16 dereferenceable(16) %p) {
+; CHECK-LABEL: @load_f32_insert_v16f32(
 ; CHECK-NEXT:    [[S:%.*]] = load float, float* [[P:%.*]], align 4
-; CHECK-NEXT:    [[R:%.*]] = insertelement <8 x float> undef, float [[S]], i32 0
-; CHECK-NEXT:    ret <8 x float> [[R]]
+; CHECK-NEXT:    [[R:%.*]] = insertelement <16 x float> undef, float [[S]], i32 0
+; CHECK-NEXT:    ret <16 x float> [[R]]
 ;
   %s = load float, float* %p, align 4
-  %r = insertelement <8 x float> undef, float %s, i32 0
-  ret <8 x float> %r
+  %r = insertelement <16 x float> undef, float %s, i32 0
+  ret <16 x float> %r
 }
 
 ; TODO: Should load v4f32.