[llvm] 09288bc - [X86] Add assembler support for .d32 and .d8 mnemonic suffixes to control displacement size.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-08-26T10:45:50-07:00
New Revision: 09288bcbf5f124a2b0e24a6b1f2d27b66dba9adf

URL: https://github.com/llvm/llvm-project/commit/09288bcbf5f124a2b0e24a6b1f2d27b66dba9adf
DIFF: https://github.com/llvm/llvm-project/commit/09288bcbf5f124a2b0e24a6b1f2d27b66dba9adf.diff

LOG: [X86] Add assembler support for .d32 and .d8 mnemonic suffixes to control displacement size.

This is an older syntax than the {disp32} and {disp8} pseudo
prefixes that were added a few weeks ago. We can reuse most of
the support for that to support .d32 and .d8 as well.

Added: 
    

Modified: 
    llvm/docs/ReleaseNotes.rst
    llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
    llvm/test/MC/X86/x86-32.s
    llvm/test/MC/X86/x86-64.s

Removed: 
    


################################################################################
diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index c6b2a3ac9bb5..d1075da16a9d 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -98,6 +98,9 @@ During this release ...
   frontend in 10.0. Mention of the 'mpx' feature in an IR file will print a
   message to stderr, but IR should still compile.
 * Support for -march=sapphirerapids was added.
+* The assembler now has support for {disp32} and {disp8} pseudo prefixes for
+  controlling displacement size for memory operands and jump displacements. The
+  assembler also supports the .d32 and .d8 mnemonic suffixes to do the same.
 
 Changes to the AMDGPU Target
 -----------------------------

diff  --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index ddb13e46e930..5694105dcbd1 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -2670,6 +2670,13 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
     break;
   }
 
+  // Support the suffix syntax for overriding displacement size as well.
+  if (Name.consume_back(".d32")) {
+    ForcedDispEncoding = DispEncoding_Disp32;
+  } else if (Name.consume_back(".d8")) {
+    ForcedDispEncoding = DispEncoding_Disp8;
+  }
+
   StringRef PatchedName = Name;
 
   // Hack to skip "short" following Jcc.

diff  --git a/llvm/test/MC/X86/x86-32.s b/llvm/test/MC/X86/x86-32.s
index ef9f5ebfdd92..426ab617b6b0 100644
--- a/llvm/test/MC/X86/x86-32.s
+++ b/llvm/test/MC/X86/x86-32.s
@@ -1110,16 +1110,24 @@ ptwritel 0xdeadbeef(%ebx,%ecx,8)
 // CHECK:  encoding: [0xf3,0x0f,0xae,0xe0]
 ptwritel %eax
 
+// CHECK: jmp foo
+// CHECK:  encoding: [0xe9,A,A,A,A]
+// CHECK:  fixup A - offset: 1, value: foo-4, kind: FK_PCRel_4
 // CHECK: jmp foo
 // CHECK:  encoding: [0xe9,A,A,A,A]
 // CHECK:  fixup A - offset: 1, value: foo-4, kind: FK_PCRel_4
 {disp32} jmp foo
+jmp.d32 foo
 foo:
 
+// CHECK: je foo
+// CHECK:  encoding: [0x0f,0x84,A,A,A,A]
+// CHECK:  fixup A - offset: 2, value: foo-4, kind: FK_PCRel_4
 // CHECK: je foo
 // CHECK:  encoding: [0x0f,0x84,A,A,A,A]
 // CHECK:  fixup A - offset: 2, value: foo-4, kind: FK_PCRel_4
 {disp32} je foo
+je.d32 foo
 
 // CHECK: ljmpl *%cs:305419896
 // CHECK:  encoding: [0x2e,0xff,0x2d,0x78,0x56,0x34,0x12]

diff  --git a/llvm/test/MC/X86/x86-64.s b/llvm/test/MC/X86/x86-64.s
index c61cae69c3ff..911aa294fbd0 100644
--- a/llvm/test/MC/X86/x86-64.s
+++ b/llvm/test/MC/X86/x86-64.s
@@ -1912,9 +1912,15 @@ ud2b (%rbx), %rcx
 // CHECK: encoding: [0xc7,0x40,0x00,0x01,0x00,0x00,0x00]
 // CHECK: movl $1, (%rax)
 // CHECK: encoding: [0xc7,0x80,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00]
+// CHECK: movl $1, (%rax)
+// CHECK: encoding: [0xc7,0x40,0x00,0x01,0x00,0x00,0x00]
+// CHECK: movl $1, (%rax)
+// CHECK: encoding: [0xc7,0x80,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x00]
 movl $1, (%rax)
 {disp8} movl $1, (%rax)
 {disp32} movl $1, (%rax)
+movl.d8 $1, (%rax)
+movl.d32 $1, (%rax)
 
 // Requires disp8 by default
 // CHECK: movl $1, (%rbp)