[PATCH] D86613: [ARM][LowOverheadLoops] Liveouts and reductions

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: dmgreen, SjoerdMeijer, anwel, samtebbs.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.
samparker requested review of this revision.

I've removed the code that tried to look for reduction patterns, since the vectorizer and isel can now produce predicated reductions within the loop body. This has required some reorganisation and fixes around live-out and predication checks, as well as looking for cases where an input/output is initialised to zero.
I've only changed one test, one_loop_add_add_v16i8 in reductions.ll, to represent what IR should now be generated, but the rest of those functions remain untouched and are still tail-predicated...

  @@ -152,16 +130,18 @@ define dso_local arm_aapcs_vfpcc zeroext i8 @one_loop_sub_add_v16i8(i8* nocaptur
   ; CHECK-NEXT:    uxtbeq r0, r0
   ; CHECK-NEXT:    bxeq lr
   ; CHECK-NEXT:    push {r7, lr}
  -; CHECK-NEXT:    vmov.i32 q0, #0x0
  +; CHECK-NEXT:    vmov.i32 q1, #0x0
   ; CHECK-NEXT:    dlstp.8 lr, r2
   ; CHECK-NEXT:  .LBB2_1: @ %vector.body
   ; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
  +; CHECK-NEXT:    vmov q0, q1
   ; CHECK-NEXT:    vldrb.u8 q1, [r1], #16
   ; CHECK-NEXT:    vldrb.u8 q2, [r0], #16
   ; CHECK-NEXT:    vsub.i8 q1, q2, q1
  -; CHECK-NEXT:    vadd.i8 q0, q1, q0
  +; CHECK-NEXT:    vadd.i8 q1, q1, q0
   ; CHECK-NEXT:    letp lr, .LBB2_1
   ; CHECK-NEXT:  @ %bb.2: @ %middle.block
  +; CHECK-NEXT:    vpsel q0, q1, q0

A lot of other tests look much worse because tail predication is no longer happening (probably more correct though!) and we don't expect to see those types of reductions anymore. I didn't want to make a whole bunch of test changes because enough of the existing tests have already changed and I don't want those to get lost with lots of input change.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D86613

Files:
  llvm/include/llvm/CodeGen/ReachingDefAnalysis.h
  llvm/lib/CodeGen/ReachingDefAnalysis.cpp
  llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/disjoint-vcmp.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/extract-element.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-operand.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/no-vpsel-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/reductions.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/unpredload.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/varying-outer-2d-reduction.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-add-operand-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/wlstp.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-opcode-liveout.mir
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/wrong-vctp-operand-liveout.mir
  llvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll
  llvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll

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