[PATCH] D86601: [LegalizeTypes] Add ROTL/ROTR to ScalarizeVectorResult.
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 26 04:12:10 PDT 2020
spatel added a comment.
I thought a non-native vector type would trigger this, but this might be a different bug?
$ cat rot.ll
define <2 x i16> @var_funnnel_v2i16(<2 x i16> %x, <2 x i16> %amt) nounwind {
%res = call <2 x i16> @llvm.fshr.v2i16(<2 x i16> %x, <2 x i16> %x, <2 x i16> %amt)
ret <2 x i16> %res
}
declare <2 x i16> @llvm.fshr.v2i16(<2 x i16>, <2 x i16>, <2 x i16>)
$ llc -o - rot.ll -mtriple=aarch64
.text
.file "rot.ll"
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: ./llc -o - rot.ll -mtriple=aarch64
1. Running pass 'Function Pass Manager' on module 'rot.ll'.
2. Running pass 'AArch64 Instruction Selection' on function '@var_funnnel_v2i16'
0 llc 0x0000000107f0bcd5 llvm::sys::PrintStackTrace(llvm::raw_ostream&) + 37
1 llc 0x0000000107f0aa68 llvm::sys::RunSignalHandlers() + 248
2 llc 0x0000000107f0c2ec SignalHandler(int) + 268
3 libsystem_platform.dylib 0x00007fff6a6725fd _sigtramp + 29
4 libsystem_platform.dylib 0x0000000000000010 _sigtramp + 18446603338731018800
5 llc 0x0000000107c8f9f3 llvm::DAGTypeLegalizer::ReplaceValueWith(llvm::SDValue, llvm::SDValue) + 67
6 llc 0x0000000107c66090 llvm::DAGTypeLegalizer::PromoteIntegerResult(llvm::SDNode*, unsigned int) + 784
7 llc 0x0000000107c8ef38 llvm::DAGTypeLegalizer::run() + 2808
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D86601/new/
https://reviews.llvm.org/D86601
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