[PATCH] D86586: [TableGen] Support tied operands that are both source operands

[Brian Leibig via Phabricator via llvm-commits]

bleibig created this revision.
bleibig added reviewers: simon_tatham, stoklund, MatzeB.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
bleibig requested review of this revision.

Currently tied operands have a restriction that one is a source and
the other is a dest. This patch aims to relax that restriction, so
that two source operands can be tied.

The purpose is enable the kind of tablegen definition described here:
http://lists.llvm.org/pipermail/llvm-dev/2019-April/131663.html
Where two source operands from different register files must have the
same register number, as the bits in the encoding specify the register
number for two different operands (other bits specify the register
files used). Even though the first operand is called "dst", it must be
treated as a source operand as it holds an address that the
instruction writes to (like a store instruction), and thus must be
loaded appropriately before the instruction is generated.

Part of these changes remove the ConstraintChecking{4,5}.td tests as
they check for an error that shouldn't be occuring anymore, tests 6
and 7 have been shifted down to replace them.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D86586

Files:
  llvm/lib/CodeGen/MachineInstr.cpp
  llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  llvm/test/TableGen/ConstraintChecking4.td
  llvm/test/TableGen/ConstraintChecking5.td
  llvm/test/TableGen/ConstraintChecking6.td
  llvm/test/TableGen/ConstraintChecking7.td
  llvm/utils/TableGen/CodeGenInstruction.cpp


Index: llvm/utils/TableGen/CodeGenInstruction.cpp
===================================================================
--- llvm/utils/TableGen/CodeGenInstruction.cpp
+++ llvm/utils/TableGen/CodeGenInstruction.cpp
@@ -291,16 +291,6 @@
   std::pair<unsigned,unsigned> SrcOp = (FirstIsDest ? RHSOp : LHSOp);
   StringRef SrcOpName = (FirstIsDest ? RHSOpName : LHSOpName);
 
-  // Ensure one operand is a def and the other is a use.
-  if (DestOp.first >= Ops.NumDefs)
-    PrintFatalError(
-      Rec->getLoc(), "Input operands '" + LHSOpName + "' and '" + RHSOpName +
-      "' of '" + Rec->getName() + "' cannot be tied!");
-  if (SrcOp.first < Ops.NumDefs)
-    PrintFatalError(
-      Rec->getLoc(), "Output operands '" + LHSOpName + "' and '" + RHSOpName +
-      "' of '" + Rec->getName() + "' cannot be tied!");
-
   // The constraint has to go on the operand with higher index, i.e.
   // the source one. Check there isn't another constraint there
   // already.
Index: llvm/test/TableGen/ConstraintChecking7.td
===================================================================
--- llvm/test/TableGen/ConstraintChecking7.td
+++ /dev/null
@@ -1,6 +0,0 @@
-// RUN: not llvm-tblgen -gen-asm-writer -I %p -I %p/../../include %s 2>&1 | FileCheck %s -DFILE=%s
-
-include "ConstraintChecking.inc"
-
-// CHECK: [[FILE]]:[[@LINE+1]]:1: error: Operand '$src1' of 'Foo' cannot have multiple constraints!
-def Foo : TestInstructionWithConstraints<"$dest1 = $src1, $dest2 = $src1">;
Index: llvm/test/TableGen/ConstraintChecking6.td
===================================================================
--- llvm/test/TableGen/ConstraintChecking6.td
+++ /dev/null
@@ -1,6 +0,0 @@
-// RUN: not llvm-tblgen -gen-asm-writer -I %p -I %p/../../include %s 2>&1 | FileCheck %s -DFILE=%s
-
-include "ConstraintChecking.inc"
-
-// CHECK: [[FILE]]:[[@LINE+1]]:1: error: Operand '$dest1' of 'Foo' cannot have multiple operands tied to it!
-def Foo : TestInstructionWithConstraints<"$dest1 = $src1, $dest1 = $src2">;
Index: llvm/test/TableGen/ConstraintChecking5.td
===================================================================
--- llvm/test/TableGen/ConstraintChecking5.td
+++ llvm/test/TableGen/ConstraintChecking5.td
@@ -2,5 +2,5 @@
 
 include "ConstraintChecking.inc"
 
-// CHECK: [[FILE]]:[[@LINE+1]]:1: error: Input operands '$src1' and '$src2' of 'Foo' cannot be tied!
-def Foo : TestInstructionWithConstraints<"$src1 = $src2">;
+// CHECK: [[FILE]]:[[@LINE+1]]:1: error: Operand '$src1' of 'Foo' cannot have multiple constraints!
+def Foo : TestInstructionWithConstraints<"$dest1 = $src1, $dest2 = $src1">;
Index: llvm/test/TableGen/ConstraintChecking4.td
===================================================================
--- llvm/test/TableGen/ConstraintChecking4.td
+++ llvm/test/TableGen/ConstraintChecking4.td
@@ -2,5 +2,5 @@
 
 include "ConstraintChecking.inc"
 
-// CHECK: [[FILE]]:[[@LINE+1]]:1: error: Output operands '$dest1' and '$dest2' of 'Foo' cannot be tied!
-def Foo : TestInstructionWithConstraints<"$dest1 = $dest2">;
+// CHECK: [[FILE]]:[[@LINE+1]]:1: error: Operand '$dest1' of 'Foo' cannot have multiple operands tied to it!
+def Foo : TestInstructionWithConstraints<"$dest1 = $src1, $dest1 = $src2">;
Index: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
===================================================================
--- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1324,6 +1324,10 @@
     // Tied constraint already satisfied?
     if (SrcReg == DstReg)
       continue;
+    // Ignore tied operands where both are source operands.
+    if (!DstMO.isDef()) {
+      continue;
+    }
 
     assert(SrcReg && SrcMO.isUse() && "two address instruction invalid");
 
Index: llvm/lib/CodeGen/MachineInstr.cpp
===================================================================
--- llvm/lib/CodeGen/MachineInstr.cpp
+++ llvm/lib/CodeGen/MachineInstr.cpp
@@ -1090,7 +1090,6 @@
 void MachineInstr::tieOperands(unsigned DefIdx, unsigned UseIdx) {
   MachineOperand &DefMO = getOperand(DefIdx);
   MachineOperand &UseMO = getOperand(UseIdx);
-  assert(DefMO.isDef() && "DefIdx must be a def operand");
   assert(UseMO.isUse() && "UseIdx must be a use operand");
   assert(!DefMO.isTied() && "Def is already tied to another use");
   assert(!UseMO.isTied() && "Use is already tied to another def");


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