[PATCH] D85546: [SVE] Add ISD nodes for predicated integer extend inreg operations

[Cameron McInally via Phabricator via llvm-commits]

cameron.mcinally added a comment.

D86394 <https://reviews.llvm.org/D86394> addresses a different issue, I think. Posted some new code in D85364 <https://reviews.llvm.org/D85364> to expose the AArch64ISD::ZERO_EXTEND_INREG_MERGE_PASSTHRU issue.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D85546/new/

https://reviews.llvm.org/D85546