[PATCH] D86262: [LoopIdiomRecognizePass] Options to disable part or the entire Loop Idiom Recognize Pass

[Bardia Mahjour via Phabricator via llvm-commits]

bmahjour added a comment.

@lebedev.ri

> I'd like to see a PhaseOrdering test showing the IR that is not optimized due to the DA being unaware about these intrinsics.

Here's a test that shows a memset created by loop-idiom can prevent loop interchange because the dependence vectors are pessimized:

  ; ModuleID = 'interchange.ll'
  source_filename = "interchange.c"
  target datalayout = "e-m:e-i64:64-n32:64"
  target triple = "powerpc64le-unknown-linux-gnu"
  
  ; Function Attrs: nounwind
  define dso_local void @foo([1024 x i32]* %a, [1024 x i32]* %b, [1024 x [1024 x i32]]* %c, i32 signext %n) #0 {
  entry:
    br label %for.body
  
  for.body:                                         ; preds = %entry, %for.inc16
    %indvars.iv7 = phi i64 [ 0, %entry ], [ %indvars.iv.next8, %for.inc16 ]
    br label %for.body4
  
  for.body4:                                        ; preds = %for.body, %for.inc13
    %indvars.iv4 = phi i64 [ 0, %for.body ], [ %indvars.iv.next5, %for.inc13 ]
    br label %for.body8
  
  for.body8:                                        ; preds = %for.body4, %for.body8
    %indvars.iv = phi i64 [ 0, %for.body4 ], [ %indvars.iv.next, %for.body8 ]
    %arrayidx12 = getelementptr inbounds [1024 x [1024 x i32]], [1024 x [1024 x i32]]* %c, i64 %indvars.iv4, i64 %indvars.iv7, i64 %indvars.iv
    store i32 0, i32* %arrayidx12, align 4, !tbaa !2
    %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
    %exitcond = icmp ne i64 %indvars.iv.next, 1024
    br i1 %exitcond, label %for.body8, label %for.inc13
  
  for.inc13:                                        ; preds = %for.body8
    %indvars.iv.next5 = add nuw nsw i64 %indvars.iv4, 1
    %exitcond6 = icmp ne i64 %indvars.iv.next5, 1024
    br i1 %exitcond6, label %for.body4, label %for.inc16
  
  for.inc16:                                        ; preds = %for.inc13
    %indvars.iv.next8 = add nuw nsw i64 %indvars.iv7, 1
    %exitcond9 = icmp ne i64 %indvars.iv.next8, 1024
    br i1 %exitcond9, label %for.body, label %for.end18
  
  for.end18:                                        ; preds = %for.inc16
    ret void
  }
  
  ; Function Attrs: argmemonly nounwind willreturn
  declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #1
  
  ; Function Attrs: argmemonly nounwind willreturn
  declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #1
  
  attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-spe" "unsafe-fp-math"="true" "use-soft-float"="false" }
  attributes #1 = { argmemonly nounwind willreturn }
  
  !llvm.module.flags = !{!0}
  !llvm.ident = !{!1}
  
  !0 = !{i32 1, !"wchar_size", i32 4}
  !1 = !{!"XL C/C++ for Linux on Power, (IBM Internal Development Branch), clang version 12.0.0 (git at github.ibm.com:compiler/llvm-project.git 4285385d877abd46f7a8c81d52e7aeff7a92b6a1)"}
  !2 = !{!3, !3, i64 0}
  !3 = !{!"int", !4, i64 0}
  !4 = !{!"omnipotent char", !5, i64 0}
  !5 = !{!"Simple C/C++ TBAA"}

without loop-idiom:

  > opt interchange.simp.ll -S -basic-aa -loop-interchange -o out.ll -stats -debug-only=loop-interchange -loop-interchange-threshold=-2 2>&1 | grep -E -- 'legality|loop-interchange'
  2 loop-interchange - Number of loops interchanged

with loop-idiom:

  > opt interchange.simp.ll -S -basic-aa -loop-idiom -loop-interchange -o out.ll -stats -debug-only=loop-interchange -loop-interchange-threshold=-2 2>&1 | grep -E -- 'legality|loop-interchange'
  Not interchanging loops. Cannot prove legality.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D86262/new/

https://reviews.llvm.org/D86262