[llvm] 8ac7069 - [SystemZ] Preserve the MachineMemOperand in emitCondStore() in all cases.
Jonas Paulsson via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 24 05:09:38 PDT 2020
Author: Jonas Paulsson
Date: 2020-08-24T14:07:30+02:00
New Revision: 8ac70694b9f963db198f0fc9aec3fcee78a52fa6
URL: https://github.com/llvm/llvm-project/commit/8ac70694b9f963db198f0fc9aec3fcee78a52fa6
DIFF: https://github.com/llvm/llvm-project/commit/8ac70694b9f963db198f0fc9aec3fcee78a52fa6.diff
LOG: [SystemZ] Preserve the MachineMemOperand in emitCondStore() in all cases.
Review: Ulrich Weigand
Added:
Modified:
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index eb1e51341ec4..9f1805879e7c 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -7246,6 +7246,15 @@ MachineBasicBlock *SystemZTargetLowering::emitCondStore(MachineInstr &MI,
StoreOpcode = TII->getOpcodeForOffset(StoreOpcode, Disp);
+ // ISel pattern matching also adds a load memory operand of the same
+ // address, so take special care to find the storing memory operand.
+ MachineMemOperand *MMO = nullptr;
+ for (auto *I : MI.memoperands())
+ if (I->isStore()) {
+ MMO = I;
+ break;
+ }
+
// Use STOCOpcode if possible. We could use
diff erent store patterns in
// order to avoid matching the index register, but the performance trade-offs
// might be more complicated in that case.
@@ -7253,15 +7262,6 @@ MachineBasicBlock *SystemZTargetLowering::emitCondStore(MachineInstr &MI,
if (Invert)
CCMask ^= CCValid;
- // ISel pattern matching also adds a load memory operand of the same
- // address, so take special care to find the storing memory operand.
- MachineMemOperand *MMO = nullptr;
- for (auto *I : MI.memoperands())
- if (I->isStore()) {
- MMO = I;
- break;
- }
-
BuildMI(*MBB, MI, DL, TII->get(STOCOpcode))
.addReg(SrcReg)
.add(Base)
@@ -7306,7 +7306,8 @@ MachineBasicBlock *SystemZTargetLowering::emitCondStore(MachineInstr &MI,
.addReg(SrcReg)
.add(Base)
.addImm(Disp)
- .addReg(IndexReg);
+ .addReg(IndexReg)
+ .addMemOperand(MMO);
MBB->addSuccessor(JoinMBB);
MI.eraseFromParent();
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