[llvm] 52df6ca - [InstCombine] add tests for abs of select with negated op; NFC (PR39474)

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2020-08-24T07:37:54-04:00
New Revision: 52df6cac204a866d1797dad844c1e587a1b4b075

URL: https://github.com/llvm/llvm-project/commit/52df6cac204a866d1797dad844c1e587a1b4b075
DIFF: https://github.com/llvm/llvm-project/commit/52df6cac204a866d1797dad844c1e587a1b4b075.diff

LOG: [InstCombine] add tests for abs of select with negated op; NFC (PR39474)

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/abs-intrinsic.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
index bf8d2b937d8b..3bb9400fde74 100644
--- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -104,3 +104,29 @@ define <4 x i32> @abs_of_neg_vec(<4 x i32> %x) {
   %b = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %a, i1 false)
   ret <4 x i32> %b
 }
+
+define i32 @abs_of_select_neg_true_val(i1 %b, i32 %x) {
+; CHECK-LABEL: @abs_of_select_neg_true_val(
+; CHECK-NEXT:    [[NEG:%.*]] = sub i32 0, [[X:%.*]]
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[B:%.*]], i32 [[NEG]], i32 [[X]]
+; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[SEL]], i1 true)
+; CHECK-NEXT:    ret i32 [[ABS]]
+;
+  %neg = sub i32 0, %x
+  %sel = select i1 %b, i32 %neg, i32 %x
+  %abs = call i32 @llvm.abs.i32(i32 %sel, i1 true)
+  ret i32 %abs
+}
+
+define <4 x i32> @abs_of_select_neg_false_val(<4 x i1> %b, <4 x i32> %x) {
+; CHECK-LABEL: @abs_of_select_neg_false_val(
+; CHECK-NEXT:    [[NEG:%.*]] = sub <4 x i32> zeroinitializer, [[X:%.*]]
+; CHECK-NEXT:    [[SEL:%.*]] = select <4 x i1> [[B:%.*]], <4 x i32> [[X]], <4 x i32> [[NEG]]
+; CHECK-NEXT:    [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> [[SEL]], i1 false)
+; CHECK-NEXT:    ret <4 x i32> [[ABS]]
+;
+  %neg = sub <4 x i32> zeroinitializer, %x
+  %sel = select <4 x i1> %b, <4 x i32> %x, <4 x i32> %neg
+  %abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %sel, i1 false)
+  ret <4 x i32> %abs
+}