[PATCH] D86431: [SVE][CodeGen] Fix up warnings in sve-split-insert/extract tests

[David Sherwood via Phabricator via llvm-commits]

david-arm created this revision.
david-arm added reviewers: sdesmalen, efriedma, kmclaughlin.
Herald added subscribers: llvm-commits, psnobl, hiraditya, kristof.beyls, tschuett.
Herald added a reviewer: rengolin.
Herald added a project: LLVM.
david-arm requested review of this revision.

I have fixed up some more ElementCount/TypeSize related warnings in
the following tests:

  CodeGen/AArch64/sve-split-extract-elt.ll
  CodeGen/AArch64/sve-split-insert-elt.ll

In SelectionDAG::CreateStackTemporary we were relying upon the implicit
cast from TypeSize -> uint64_t when calling MachineFrameInfo::CreateStackObject.
I've fixed this by passing in the known minimum size instead, which I
believe is fine because the associated stack id indicates whether this
is a scalable object or not.

I've also fixed up a case in TargetLowering::SimplifyDemandedBits when
extracting a vector element from a scalable vector. The result is a scalar,
hence it wasn't caught at the start of the function. If the index is not a
constant or is >= minimum number of elements then we just bail out for now.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D86431

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
  llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll


Index: llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
===================================================================
--- llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
+++ llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
@@ -1,5 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
+; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
+
+; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
+; WARN-NOT: warning
 
 ; INSERT VECTOR ELT
 
Index: llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
===================================================================
--- llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
+++ llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
@@ -1,5 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
+; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
+
+; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it.
+; WARN-NOT: warning
 
 ; EXTRACT VECTOR ELT
 
Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -2022,14 +2022,24 @@
   case ISD::EXTRACT_VECTOR_ELT: {
     SDValue Src = Op.getOperand(0);
     SDValue Idx = Op.getOperand(1);
-    unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
+    ElementCount SrcEC = Src.getValueType().getVectorElementCount();
+    unsigned MinNumSrcElts = SrcEC.Min;
     unsigned EltBitWidth = Src.getScalarValueSizeInBits();
+    int64_t KnownIdx = -1;
 
-    // Demand the bits from every vector element without a constant index.
-    APInt DemandedSrcElts = APInt::getAllOnesValue(NumSrcElts);
     if (auto *CIdx = dyn_cast<ConstantSDNode>(Idx))
-      if (CIdx->getAPIntValue().ult(NumSrcElts))
-        DemandedSrcElts = APInt::getOneBitSet(NumSrcElts, CIdx->getZExtValue());
+      if (CIdx->getAPIntValue().ult(MinNumSrcElts))
+        KnownIdx = CIdx->getZExtValue();
+
+    // If we don't know the index and the vector is scalable there isn't much
+    // else we can do at this point.
+    if (KnownIdx == -1 && SrcEC.Scalable)
+      return false;
+
+    // Demand the bits from every vector element without a constant index.
+    APInt DemandedSrcElts = KnownIdx != -1
+                                ? APInt::getOneBitSet(MinNumSrcElts, KnownIdx)
+                                : APInt::getAllOnesValue(MinNumSrcElts);
 
     // If BitWidth > EltBitWidth the value is anyext:ed. So we do not know
     // anything about the extended bits.
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2029,7 +2029,9 @@
   int StackID = 0;
   if (Bytes.isScalable())
     StackID = TFI->getStackIDForScalableVectors();
-  int FrameIdx = MFI.CreateStackObject(Bytes, Alignment,
+  // The stack id gives an indication of whether the object is scalable or
+  // not, so it's safe to pass in the minimum size here.
+  int FrameIdx = MFI.CreateStackObject(Bytes.getKnownMinSize(), Alignment,
                                        false, nullptr, StackID);
   return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
 }


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