[PATCH] D86420: [DAGCombiner] allow store merging non-i8 truncated ops

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: efriedma, RKSimon, craig.topper, dmgreen.
Herald added subscribers: ecnelises, hiraditya, kristof.beyls, mcrosier.
Herald added a project: LLVM.
spatel requested review of this revision.

We have a gap in our store merging capabilities for shift+truncate patterns as discussed in:
http://bugs.llvm.org/PR46662

I generalized the code/comments for this function in earlier commits, so we only need ease the type restriction and adjust the address/endian checking to make this work.
AArch64 lets us switch endian to make sure that patterns are matched either way.


https://reviews.llvm.org/D86420

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/merge-trunc-store.ll
  llvm/test/CodeGen/X86/stores-merging.ll

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