[PATCH] D77152: [SelectionDAG] Better legalization for FSHL and FSHR
Bjorn Pettersson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 21 05:10:15 PDT 2020
bjope added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:6159
+ assert(isPowerOf2_32(BW) && "Expecting the type bitwidth to be a power of 2");
+
----------------
Our OOT target got legal types that aren't pow-of-2. So this kind of broke some funnel-shift tests that happened to work earlier.
I realize that it might be hard to verify the behavior for non-pow-of-2 types upstream, so not sure if I'm welcome to do patches upstream that fixes the problem (although there might be other OOT targets in the same situation).
BTW: I haven't figured out exactly what part of the code below that only works for pow-of-2 types yet. I see some checks for `isPowerOf2_32(BW)` further down in the code, so maybe the assert isn't needed at all?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D77152/new/
https://reviews.llvm.org/D77152
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