[PATCH] D81924: [PowerPC] Allow constrained FP intrinsics in mightUseCTR

[Qing Shan Zhang via Phabricator via llvm-commits]

steven.zhang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp:410
+          // Binary operations on 128-bit value will use CTR.
+          case Intrinsic::experimental_constrained_fadd:
+          case Intrinsic::experimental_constrained_fsub:
----------------
This can be improved to map to the ISD Opcode and query the target hook to decide if it is call or instruction as what we did for sqrt etc. I think, we can post a NFC patch to handle all such intrinsic this way to sync it with lower.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81924/new/

https://reviews.llvm.org/D81924