[PATCH] D86310: [X86] Align i128 to 16 bytes in x86-64 datalayout
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 20 10:54:24 PDT 2020
craig.topper created this revision.
craig.topper added reviewers: efriedma, echristo, RKSimon, spatel.
Herald added subscribers: nikic, dexonsmith, steven_wu, javed.absar, hiraditya, dschuff.
Herald added a project: LLVM.
craig.topper requested review of this revision.
This is an attempt at rebooting https://reviews.llvm.org/D28990
I've included AutoUpgrade changes to modify the data layout to satisfy the compatible layout check. But this does mean alloca, loads, stores, etc in old IR will automatically get this new alignment.
This should fix PR46320.
https://reviews.llvm.org/D86310
Files:
clang/lib/Basic/Targets/OSTargets.h
clang/lib/Basic/Targets/X86.h
clang/test/CodeGen/target-data.c
llvm/include/llvm/IR/AutoUpgrade.h
llvm/lib/IR/AutoUpgrade.cpp
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/test/Bitcode/upgrade-datalayout.ll
llvm/test/Bitcode/upgrade-datalayout3.ll
llvm/test/CodeGen/X86/atomic-unordered.ll
llvm/test/CodeGen/X86/bitcast-i256.ll
llvm/test/CodeGen/X86/catchpad-dynamic-alloca.ll
llvm/test/CodeGen/X86/implicit-null-check.ll
llvm/test/CodeGen/X86/legalize-shl-vec.ll
llvm/test/CodeGen/X86/osx-private-labels.ll
llvm/test/CodeGen/X86/scheduler-backtracking.ll
llvm/test/CodeGen/X86/setcc-wide-types.ll
llvm/test/CodeGen/X86/sret-implicit.ll
llvm/test/CodeGen/X86/statepoint-vector.ll
llvm/test/tools/llvm-lto2/X86/pipeline.ll
llvm/test/tools/llvm-lto2/X86/slp-vectorize-pm.ll
llvm/test/tools/llvm-lto2/X86/stats-file-option.ll
llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
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