[PATCH] D85720: [AArch64][GlobalISel] Handle rtcGPR64RegClassID in AArch64RegisterBankInfo::getRegBankFromRegClass()
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 19 12:53:48 PDT 2020
This revision was automatically updated to reflect the committed changes.
Closed by commit rGe887d0e89b83: [AArch64][GlobalISel] Handle rtcGPR64RegClassID in AArch64RegisterBankInfo… (authored by tambre, committed by paquette).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D85720/new/
https://reviews.llvm.org/D85720
Files:
llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
Index: llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
+++ llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
@@ -75,6 +75,8 @@
define void @test_gphi_ptr() { ret void }
+ define void @test_restricted_tail_call() { ret void }
+
...
---
@@ -888,3 +890,20 @@
RET_ReallyLR implicit $x0
...
+
+---
+name: test_restricted_tail_call
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x16, $x17
+ ; CHECK-LABEL: name: test_restricted_tail_call
+ ; CHECK: liveins: $x16, $x17
+ ; CHECK: [[COPY:%[0-9]+]]:gpr(s64) = COPY $x16
+ ; CHECK: [[COPY1:%[0-9]+]]:gpr(s64) = COPY $x17
+ ; CHECK: RET_ReallyLR
+ %0:_(s64) = COPY $x16
+ %1:_(s64) = COPY $x17
+ RET_ReallyLR
+...
Index: llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+++ llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
@@ -261,6 +261,7 @@
case AArch64::GPR64common_and_GPR64noipRegClassID:
case AArch64::GPR64noip_and_tcGPR64RegClassID:
case AArch64::tcGPR64RegClassID:
+ case AArch64::rtcGPR64RegClassID:
case AArch64::WSeqPairsClassRegClassID:
case AArch64::XSeqPairsClassRegClassID:
return getRegBank(AArch64::GPRRegBankID);
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D85720.286637.patch
Type: text/x-patch
Size: 1493 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200819/240acdfe/attachment.bin>
More information about the llvm-commits
mailing list