[PATCH] D81537: [PowerPC] Support constrained fp operation for scalar fptosi/fptoui

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:3772
+def : Pat<(i32 (any_fp_to_uint f128:$src)),
           (i32 (MFVSRWZ (COPY_TO_REGCLASS (XSCVQPUWZ $src), VFRC)))>;
 
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uweigand wrote:
> This also doesn't look quite correct.  The XSCVQP... instructions are not (yet?) marked as mayRaiseFPException, instead they're marked as hasSideEffects.   This means that the exception flag is probably not going to be automatically transferred over to the MI level.
> 
> I think if the instructions are changed to set mayRaiseFPException, that should work correctly.  But it would be best to have a test case that validates that the "nofpexcept" marker is transferred depending on the value of the "fpexect." metadata in the strict intrinsic (in LLVM IR).
Thanks for the reminder. The FP exception bits in PPC instruction definition files need to be carefully re-examined with more tests..


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  https://reviews.llvm.org/D81537/new/

https://reviews.llvm.org/D81537