[PATCH] D60413: [BDCE] SExt -> ZExt when no sign bits is used and instruction has multiple uses

[Diogo N. Sampaio via Phabricator via llvm-commits]

dnsampaio added a comment.

I'm out in vacations, just have my phone here. I'm surprised I forgot to
preserve de debug information, sorry about that.

Regarding use of anyext on IR, I don't know how well that would play with
all other optimizations.

The sext to zext for example already exists in instruction combine, but
just for those with a single use. Perhaps these transformations could just
check the backend if it prefers sext or zext and decide to act based on
that?


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https://reviews.llvm.org/D60413