[PATCH] D81638: [AMDGPU][GlobalISel] Fix 96 and 128 local loads and stores

[Mirko Brkusanin via Phabricator via llvm-commits]

mbrkusanin added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructions.td:507
+def store_align4_local: PatFrag<(ops node:$val, node:$ptr),
+                                (store_local node:$val, node:$ptr)>, Aligned<4> {
+  let IsStore = 1;
----------------
arsenm wrote:
> mbrkusanin wrote:
> > arsenm wrote:
> > > I think the Aligned<> subclasses didn't actually work for some reason, but I only half fixed the patterns maybe?
> > I changed it so now Aligned<> subclasses are used for both load and store. They seem to work fine.
> Did you double check the generated matcher table? The problem was the current emitter only checks one of these predicates at a time, so it successfully imports but then doesn't actually perform the check. It's silently ignored
  - "GIM_CheckMemoryAlignment, /*MI*/0, /*MMO*/0, /*MinAlign*/16," and "8" does show up throughout .inc files (AMDGPUGenGlobalISel.inc) for ds_read/write instructions.
  - Aligned<> does affect produced code and other tests. 
  - Regardless off what is used, "let MinAlignment = X;" or "Aligned<X>", identical .inc files are produced.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81638/new/

https://reviews.llvm.org/D81638