[PATCH] D86084: [SVE] Fix shift-by-imm patterns used by asr, lsl & lsr intrinsics.

[Paul Walker via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9f63dc326574: [SVE] Fix shift-by-imm patterns used by asr, lsl & lsr intrinsics. (authored by paulwalker-arm).

Changed prior to commit:
  https://reviews.llvm.org/D86084?vs=286031&id=286239#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86084/new/

https://reviews.llvm.org/D86084

Files:
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-imm.ll

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