[PATCH] D86087: [ARM] Use mov operand if the mov cannot be moved while tail predicating

Sam Tebbs via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 18 02:53:13 PDT 2020


samtebbs added a comment.

In D86087#2223184 <https://reviews.llvm.org/D86087#2223184>, @samparker wrote:

> I think having the IR test is a good idea, but could you also upload it as a MIR too, just because this pass is very far away from the IR input.

Sure, there is already a mov-operand mir test that I can add to.



================
Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:229
     MachineInstr *VCTP = nullptr;
-    SmallPtrSet<MachineInstr*, 4> SecondaryVCTPs;
+    MachineOperand TPNumElements;
+    SmallPtrSet<MachineInstr *, 4> SecondaryVCTPs;
----------------
samparker wrote:
> Maybe just store the Register instead?
I considered that but getCount() needs to return a MachineOperand and I thought that reconstructing a MachineOperand from a Register would be unnecessary.


================
Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:489
+        // insertion point
+        if (ElemDef->getOpcode() == ARM::tMOVr &&
+            RDA.getUniqueReachingMIDef(ElemDef,
----------------
samparker wrote:
> In ARMBaseInstrInfo.h we have isMovRegOpcode, which also covers the T2 version.
Thanks


================
Comment at: llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp:494
+                                           ElemDef->getOperand(1).getReg())) {
+          TPNumElements = ElemDef->getOperand(1);
+          NumElements = TPNumElements.getReg();
----------------
samparker wrote:
> Maybe only call ElemDef->getOperand(1) once and give the variable a nice name?
That makes sense


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