[PATCH] D85069: [RISCV] add the MC layer support of riscv vector Zvamo extension
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 17 20:42:54 PDT 2020
HsiangKai added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCV.td:161
+ "'Zvamo'(Vector AMO Operations)",
+ [FeatureStdExtA, FeatureStdExtV]>;
+def HasStdExtZvamo : Predicate<"Subtarget->hasStdExtZvamo()">,
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There is no conclusion from 'V' specification. I think we could be conservative as Kito said. Zvamo does not imply 'A'.
Please remove FeatureStdExtA from the list. Sorry for that.
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:945
+
+let Predicates = [HasStdExtZvamo] in {
+ defm VAMOSWAPEI8 : VAMO<AMOOPVamoSwap, LSWidth8, "vamoswapei8.v">;
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Add HasStdExtA.
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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:983
+
+let Predicates = [HasStdExtZvamo, IsRV64] in {
+ defm VAMOSWAPEI64 : VAMO<AMOOPVamoSwap, LSWidth64, "vamoswapei64.v">;
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Add HasStdExtA.
================
Comment at: llvm/test/MC/RISCV/rvv/zvamo.s:2
+# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+experimental-zvamo %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \
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--mattr=+a,experimental-zvamo
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D85069/new/
https://reviews.llvm.org/D85069
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