[PATCH] D85400: [RISCV] add the MC layer support of riscv vector Zvqmac extension

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai added a comment.

These instructions and encodings are already removed from vector specification. We could postpone the patch after these instructions are included in the vector specification.



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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:921
+defm VQMACC_V : VALUr_IV_V_X<"vqmacc", 0b111101>;
+defm VQMACCSU_V : VALUr_IV_V_X<"vqmaccsu", 0b1111111>;
+defm VQMACCUS_V : VALUr_IV_V_X<"vqmaccus", 0b111110>;
----------------
0b111111


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:922
+defm VQMACCSU_V : VALUr_IV_V_X<"vqmaccsu", 0b1111111>;
+defm VQMACCUS_V : VALUr_IV_V_X<"vqmaccus", 0b111110>;
+} // Predicates = [HasStdExtZvqmac], Constraints = "@earlyclobber $vd", RVVConstraint = WidenV
----------------
VALUr_IV_X


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  https://reviews.llvm.org/D85400/new/

https://reviews.llvm.org/D85400