[llvm] bc244f0 - [X86] Truncate immediate to i8 for INTR_TYPE_3OP_IMM8

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-08-17T17:25:51-07:00
New Revision: bc244f08cf5129f99fe6f7f76a373463f07e7c84

URL: https://github.com/llvm/llvm-project/commit/bc244f08cf5129f99fe6f7f76a373463f07e7c84
DIFF: https://github.com/llvm/llvm-project/commit/bc244f08cf5129f99fe6f7f76a373463f07e7c84.diff

LOG: [X86] Truncate immediate to i8 for INTR_TYPE_3OP_IMM8

This is used for DBPSADBW which has a i32 immediate for its
intrinsic and an i8 immediate in tablegen isel patterns.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 7093ade92a54..35d65877b666 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -24513,6 +24513,12 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
       SDValue Src2 = Op.getOperand(2);
       SDValue Src3 = Op.getOperand(3);
 
+      if (IntrData->Type == INTR_TYPE_3OP_IMM8 &&
+          Src3.getValueType() != MVT::i8) {
+        Src3 = DAG.getTargetConstant(
+            cast<ConstantSDNode>(Src3)->getZExtValue() & 0xff, dl, MVT::i8);
+      }
+
       // We specify 2 possible opcodes for intrinsics with rounding modes.
       // First, we check if the intrinsic may have non-default rounding mode,
       // (IntrData->Opc1 != 0), then we check the rounding mode operand.