[llvm] 4973ca3 - [NFC][InstCombine] PHI-aware aggregate reconstruction: insert PHI node manually

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2020-08-18T00:45:17+03:00
New Revision: 4973ca3eac998068cebe7bd23f47876e7c92b87f

URL: https://github.com/llvm/llvm-project/commit/4973ca3eac998068cebe7bd23f47876e7c92b87f
DIFF: https://github.com/llvm/llvm-project/commit/4973ca3eac998068cebe7bd23f47876e7c92b87f.diff

LOG: [NFC][InstCombine] PHI-aware aggregate reconstruction: insert PHI node manually

This is NFC at the moment, because right now we always insert the PHI
into the same basic block in which the original `insertvalue` instruction
is, but that will change.

Also, fixes addition of the suffix to the value names.

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
    llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
index a10493b1008f..6f1f96f6a203 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
@@ -926,14 +926,21 @@ Instruction *InstCombinerImpl::foldAggregateConstructionIntoAggregateReuse(
   }
 
   // All good! Now we just need to thread the source aggregates here.
-  auto *PHI = PHINode::Create(AggTy, SourceAggregates.size(),
-                              OrigIVI.getName() + ".merged");
+  // Note that we have to insert the new PHI here, ourselves, because we can't
+  // rely on InstCombinerImpl::run() inserting it into the right basic block.
+  BuilderTy::InsertPointGuard Guard(Builder);
+  Builder.SetInsertPoint(UseBB->getFirstNonPHI());
+  auto *PHI = Builder.CreatePHI(AggTy, SourceAggregates.size(),
+                                OrigIVI.getName() + ".merged");
   for (const std::pair<BasicBlock *, Value *> &SourceAggregate :
        SourceAggregates)
     PHI->addIncoming(SourceAggregate.second, SourceAggregate.first);
 
   ++NumAggregateReconstructionsSimplified;
-  return PHI;
+  OrigIVI.replaceAllUsesWith(PHI);
+
+  // Just signal that the fold happened, we've already inserted instructions.
+  return &OrigIVI;
 }
 
 /// Try to find redundant insertvalue instructions, like the following ones:

diff  --git a/llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll b/llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
index 322ad2ef7139..41a298c71dcb 100644
--- a/llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
+++ b/llvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
@@ -24,9 +24,9 @@ define { i32, i32 } @test0({ i32, i32 } %agg_left, { i32, i32 } %agg_right, i1 %
 ; CHECK-NEXT:    call void @bar()
 ; CHECK-NEXT:    br label [[END]]
 ; CHECK:       end:
-; CHECK-NEXT:    [[I8:%.*]] = phi { i32, i32 } [ [[AGG_RIGHT:%.*]], [[RIGHT]] ], [ [[AGG_LEFT:%.*]], [[LEFT]] ]
+; CHECK-NEXT:    [[I8_MERGED:%.*]] = phi { i32, i32 } [ [[AGG_RIGHT:%.*]], [[RIGHT]] ], [ [[AGG_LEFT:%.*]], [[LEFT]] ]
 ; CHECK-NEXT:    call void @baz()
-; CHECK-NEXT:    ret { i32, i32 } [[I8]]
+; CHECK-NEXT:    ret { i32, i32 } [[I8_MERGED]]
 ;
 entry:
   br i1 %c, label %left, label %right
@@ -278,12 +278,12 @@ define { i32, i32 } @test5({ i32, i32 } %agg_left, { i32, i32 } %agg_right, i1 %
 ; CHECK-NEXT:    call void @bar()
 ; CHECK-NEXT:    br label [[MIDDLE]]
 ; CHECK:       middle:
-; CHECK-NEXT:    [[I8:%.*]] = phi { i32, i32 } [ [[I8]], [[MIDDLE]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]] ], [ [[AGG_LEFT:%.*]], [[LEFT]] ]
+; CHECK-NEXT:    [[I8_MERGED:%.*]] = phi { i32, i32 } [ [[I8_MERGED]], [[MIDDLE]] ], [ [[AGG_RIGHT:%.*]], [[RIGHT]] ], [ [[AGG_LEFT:%.*]], [[LEFT]] ]
 ; CHECK-NEXT:    call void @baz()
 ; CHECK-NEXT:    [[C1:%.*]] = call i1 @geni1()
 ; CHECK-NEXT:    br i1 [[C1]], label [[END:%.*]], label [[MIDDLE]]
 ; CHECK:       end:
-; CHECK-NEXT:    ret { i32, i32 } [[I8]]
+; CHECK-NEXT:    ret { i32, i32 } [[I8_MERGED]]
 ;
 entry:
   br i1 %c0, label %left, label %right