[PATCH] D85203: TableGen/GlobalISel: Allow inst matcher to check multiple opcodes
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 17 09:29:18 PDT 2020
arsenm updated this revision to Diff 286050.
arsenm added a comment.
Fix breaking SwitchOpcode optimization
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D85203/new/
https://reviews.llvm.org/D85203
Files:
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
llvm/test/TableGen/GlobalISelEmitter-immAllZeroOne.td
llvm/utils/TableGen/GlobalISelEmitter.cpp
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