[PATCH] D86084: [SVE] Fix shift-by-imm patterns used by asr, lsl & lsr intrinsics.

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added reviewers: david-arm, kmclaughlin, cameron.mcinally.
paulwalker-arm added a comment.

This is something that has fallen out from my work to use immediate forms for fixed length vector shifts, which I thought worth doing first.  I also plan to build upon it to clean up some of the sve2 intrinsics like the rounding shifts.

Clearly the lsl by #0 and lsr by >#bitwidth cases should not actually result in shift instructions but at least it's providing a route to better test the today's patterns.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D86084/new/

https://reviews.llvm.org/D86084