[PATCH] D86064: AMDGPU/GlobalISel: Match global saddr addressing mode

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3298
+  if (PtrBaseDef->getOpcode() != AMDGPU::G_PTR_ADD)
+    return None;
+
----------------
foad wrote:
> How do we handle the addressing mode where there is no saddr, just vaddr+offset?
Yes. The case this doesn't handle (which I haven't done in the DAG either) is: (SGPR64 + imm), which does require initializing the VGPR offset to 0, but this is fewer instructions than the two required to copy an SGPR64 to VGPR64


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  https://reviews.llvm.org/D86064/new/

https://reviews.llvm.org/D86064