[PATCH] D85973: [PowerPC] Fix thunk alignment issue when using pc-rel instruction

Victor Huang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 14 14:08:06 PDT 2020


NeHuang added inline comments.


================
Comment at: lld/test/ELF/ppc64-toc-call-to-pcrel.s:35
 # CHECK-LABEL: caller_14
-# CHECK:       bfl 0, 0x1002003c
+# CHECK:       bfl 0, 0x10020040
 # CHECK-NEXT:  ld 2, 24(1)
----------------
MaskRay wrote:
> NeHuang wrote:
> > MaskRay wrote:
> > > Doesn't it have ` <__toc_save_callee>`?
> > Sorry I did not quite get your point. `0x10020040` is the start address of `__toc_save_callee` stub. 
> For b and bl , objdump -d symbolizes the target address. If it symbolizes bfl and the result is meaningful, please add ` <__toc_save_callee>`
> 
Thanks for the clarification. Run object dump with `llvm-objdump -d --no-show-raw-insn --mcpu=future ppc64-toc-call-to-pcrel.s.tmp` and got results as below, I do not think the dis-assembler gives us the stub name for `bfl` and we can not add <__toc_save_callee> here. 
```
...
1002002c: lwz 3, 32724(30)
10020030: bfl 0, 0x10020040
10020034: ld 2, 24(1)
...
```



Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85973/new/

https://reviews.llvm.org/D85973



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