[PATCH] D84360: [LLD][PowerPC] Implement GOT to PC-Rel relaxation

[Sean Fertile via Phabricator via llvm-commits]

sfertile added a comment.

I believe we can have the optimization relocation on a code sequence like:

  paddi ra, sym at pcrel
  load/store rt, offset(ra)

If so we should have a test showing we relocate it properly even if we don't optimize it yet.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D84360