[llvm] a2dc19b - [Hexagon] Return scalar size in getMinVectorRegisterBitWidth() when no HVX

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 12 08:14:19 PDT 2020


Author: Krzysztof Parzyszek
Date: 2020-08-12T10:13:58-05:00
New Revision: a2dc19b81b1ebf19256749b4603052106b76ca69

URL: https://github.com/llvm/llvm-project/commit/a2dc19b81b1ebf19256749b4603052106b76ca69
DIFF: https://github.com/llvm/llvm-project/commit/a2dc19b81b1ebf19256749b4603052106b76ca69.diff

LOG: [Hexagon] Return scalar size in getMinVectorRegisterBitWidth() when no HVX

This fixes https://llvm.org/PR47128.

Added: 
    

Modified: 
    llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
index 0cdb383eb924..ce674d638ccb 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
@@ -114,7 +114,7 @@ unsigned HexagonTTIImpl::getRegisterBitWidth(bool Vector) const {
 }
 
 unsigned HexagonTTIImpl::getMinVectorRegisterBitWidth() const {
-  return useHVX() ? ST.getVectorLength()*8 : 0;
+  return useHVX() ? ST.getVectorLength()*8 : 32;
 }
 
 unsigned HexagonTTIImpl::getMinimumVF(unsigned ElemWidth) const {


        


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