[llvm] b97e402 - [VectorCombine] add test for Hexagon that would crash; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2020-08-12T08:38:20-04:00
New Revision: b97e402ca5ba3d1a4795ed61f8cb36783b00ed44

URL: https://github.com/llvm/llvm-project/commit/b97e402ca5ba3d1a4795ed61f8cb36783b00ed44
DIFF: https://github.com/llvm/llvm-project/commit/b97e402ca5ba3d1a4795ed61f8cb36783b00ed44.diff

LOG: [VectorCombine] add test for Hexagon that would crash; NFC

This test verifies the code change from:
rGb0b95dab1ce2
(although that would not be true if PR47128 is fixed)

Added: 
    llvm/test/Transforms/VectorCombine/Hexagon/lit.local.cfg
    llvm/test/Transforms/VectorCombine/Hexagon/load.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/VectorCombine/Hexagon/lit.local.cfg b/llvm/test/Transforms/VectorCombine/Hexagon/lit.local.cfg
new file mode 100644
index 000000000000..cc6a7edf05f3
--- /dev/null
+++ b/llvm/test/Transforms/VectorCombine/Hexagon/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'Hexagon' in config.root.targets:
+    config.unsupported = True

diff  --git a/llvm/test/Transforms/VectorCombine/Hexagon/load.ll b/llvm/test/Transforms/VectorCombine/Hexagon/load.ll
new file mode 100644
index 000000000000..2fe0b0f59e00
--- /dev/null
+++ b/llvm/test/Transforms/VectorCombine/Hexagon/load.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -vector-combine -S -mtriple=hexagon-- | FileCheck %s --check-prefixes=CHECK
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
+; This would crash because TTI returns "0" for vector length.
+
+define <4 x float> @load_f32_insert_v4f32(float* align 16 dereferenceable(16) %p) {
+; CHECK-LABEL: @load_f32_insert_v4f32(
+; CHECK-NEXT:    [[S:%.*]] = load float, float* [[P:%.*]], align 4
+; CHECK-NEXT:    [[R:%.*]] = insertelement <4 x float> undef, float [[S]], i32 0
+; CHECK-NEXT:    ret <4 x float> [[R]]
+;
+  %s = load float, float* %p, align 4
+  %r = insertelement <4 x float> undef, float %s, i32 0
+  ret <4 x float> %r
+}