[PATCH] D85767: [AMDGPU] Spill register and offset register cannot be same

[Mahesha S via Phabricator via llvm-commits]

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Mark spill register as used so we will not choose it as offset register,
Otherwise, spill register may possibly get killed even before spill


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85767

Files:
  llvm/lib/Target/AMDGPU/SIFrameLowering.cpp


Index: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -158,6 +158,10 @@
     return;
   }
 
+  // Mark spill register as used so we will not choose it as `OffsetReg`,
+  // Otherwise, spill register may possibly get killed even before spill
+  LiveRegs.addReg(SpillReg);
+
   MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister(
     MF->getRegInfo(), LiveRegs, AMDGPU::VGPR_32RegClass);
 


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