[PATCH] D85726: [VE] Change to promote i32 AND/OR/XOR operations

[Simon Moll via Phabricator via llvm-commits]

simoll accepted this revision.
simoll added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/test/CodeGen/VE/xor.ll:115-118
+; CHECK-NEXT:    lea %s1, -2147483648
+; CHECK-NEXT:    and %s1, %s1, (32)0
+; CHECK-NEXT:    xor %s0, %s0, %s1
 ; CHECK-NEXT:    or %s11, 0, %s9
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Are you planning to address this regression? (non-blocker given the significant improvements everywhere else)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85726/new/

https://reviews.llvm.org/D85726