[PATCH] D84449: AMDGPU/GlobalISel: Manually select llvm.amdgcn.writelane

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

Pre-gfx10 `writelane v0, m0, s0` is legal, isn't it? Does your implementation allow for that? You don't seem to have any tests for that case.


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https://reviews.llvm.org/D84449