[PATCH] D85603: IR: Add convergence control operand bundle and intrinsics

Simon Moll via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 11 03:11:26 PDT 2020


simoll added inline comments.


================
Comment at: llvm/docs/ConvergentOperations.rst:202-203
+
+2. Executions of different static instructions always occur in different
+   dynamic instances.
+
----------------
sameerds wrote:
> simoll wrote:
> > I suppose this only refers to convergent instructions but it isn't clear to me from the wording: Does this constraint apply to all IR instructions or only those that are convergent?
> > (Only 4. explicitly mentions convergent operations)
> I think the notion of dynamic instances applies to all instructions. Continuing with #3 below, it seems to me that different threads can execute the same dynamic instance of any instruction. It's just that this notion is not very interesting in the case of non-communicating instructions. The ones that communicate need to be marked convergent, so that the effect of transformations on them is limited.
I'm more concerned about the implications this constraint may have for transformation like branch fusion.
The memory model is pretty permissive and allows fusion of memory accesses regardless.
@nhaehnle Do you care about non-memory side effects, like exceptions? Do these follow the same weak semantics as the memory model?


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