[PATCH] D85712: [VE] Update bit operations

Kazushi Marukawa via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 11 01:35:22 PDT 2020


kaz7 created this revision.
kaz7 added reviewers: simoll, k-ishizaka.
kaz7 added projects: LLVM, VE.
Herald added subscribers: llvm-commits, hiraditya.
kaz7 requested review of this revision.

Change bitreverse/bswap/ctlz/ctpop/cttz regression tests to support i128
and signext/zeroext i32 types.  This patch also change the way to support
i32 types using 64 bits VE instructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85712

Files:
  llvm/lib/Target/VE/VEISelLowering.cpp
  llvm/lib/Target/VE/VEISelLowering.h
  llvm/lib/Target/VE/VEInstrInfo.td
  llvm/test/CodeGen/VE/bitreverse.ll
  llvm/test/CodeGen/VE/bswap.ll
  llvm/test/CodeGen/VE/ctlz.ll
  llvm/test/CodeGen/VE/ctpop.ll
  llvm/test/CodeGen/VE/cttz.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D85712.284606.patch
Type: text/x-patch
Size: 33345 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200811/90faf3d9/attachment.bin>


More information about the llvm-commits mailing list