[llvm] 4f9f4b2 - [ARM] Unrestrict Armv8-a IT when at minsize

Sam Parker via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 10 07:00:21 PDT 2020


Author: Sam Parker
Date: 2020-08-10T14:59:53+01:00
New Revision: 4f9f4b21e07ba8137b40659ac5d3955586ce81bb

URL: https://github.com/llvm/llvm-project/commit/4f9f4b21e07ba8137b40659ac5d3955586ce81bb
DIFF: https://github.com/llvm/llvm-project/commit/4f9f4b21e07ba8137b40659ac5d3955586ce81bb.diff

LOG: [ARM] Unrestrict Armv8-a IT when at minsize

IT blocks with more than one instruction were performance deprecated in Armv8
but that doesn't mean we should follow that advise when optimising for size.

Differential Revision: https://reviews.llvm.org/D85638

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
    llvm/lib/Target/ARM/ARMSubtarget.cpp
    llvm/test/CodeGen/ARM/codesize-ifcvt.mir
    llvm/test/CodeGen/ARM/ifcvt-size.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 0353cfd3d86f..8be1d10eba03 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -2161,7 +2161,12 @@ ARMBaseInstrInfo::extraSizeToPredicateInstructions(const MachineFunction &MF,
   // Thumb2 needs a 2-byte IT instruction to predicate up to 4 instructions.
   // ARM has a condition code field in every predicable instruction, using it
   // doesn't change code size.
-  return Subtarget.isThumb2() ? divideCeil(NumInsts, 4) * 2 : 0;
+  if (!Subtarget.isThumb2())
+    return 0;
+
+  // It's possible that the size of the IT is restricted to a single block.
+  unsigned MaxInsts = Subtarget.restrictIT() ? 1 : 4;
+  return divideCeil(NumInsts, MaxInsts) * 2;
 }
 
 unsigned

diff  --git a/llvm/lib/Target/ARM/ARMSubtarget.cpp b/llvm/lib/Target/ARM/ARMSubtarget.cpp
index 46802037c2aa..c12c08cc0ab1 100644
--- a/llvm/lib/Target/ARM/ARMSubtarget.cpp
+++ b/llvm/lib/Target/ARM/ARMSubtarget.cpp
@@ -237,7 +237,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
 
   switch (IT) {
   case DefaultIT:
-    RestrictIT = hasV8Ops();
+    RestrictIT = hasV8Ops() && !hasMinSize();
     break;
   case RestrictedIT:
     RestrictIT = true;

diff  --git a/llvm/test/CodeGen/ARM/codesize-ifcvt.mir b/llvm/test/CodeGen/ARM/codesize-ifcvt.mir
index 42d8a214f968..76b4b1dd65bf 100644
--- a/llvm/test/CodeGen/ARM/codesize-ifcvt.mir
+++ b/llvm/test/CodeGen/ARM/codesize-ifcvt.mir
@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=thumbv7 -run-pass=if-converter %s -o - | FileCheck %s
+# RUN: llc -mtriple=thumbv7 -run-pass=if-converter %s -o - | FileCheck %s --check-prefix=CHECK-V7
+# RUN: llc -mtriple=thumbv8 -run-pass=if-converter %s -o - | FileCheck %s --check-prefix=CHECK-V8
 --- |
   define void @test_nosize() {
     %c0 = icmp sgt i64 0, 0
@@ -155,34 +156,71 @@ callSites:       []
 constants:       []
 machineFunctionInfo: {}
 body:             |
-  ; CHECK-LABEL: name: test_nosize
-  ; CHECK: bb.0 (%ir-block.0):
-  ; CHECK:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
-  ; CHECK:   liveins: $lr, $r7
-  ; CHECK:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   tTAILJMPdND @extfunc, 1 /* CC::ne */, killed $cpsr, implicit $sp, implicit $sp
-  ; CHECK:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
-  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
-  ; CHECK:   frame-setup CFI_INSTRUCTION offset $lr, -4
-  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r7, -8
-  ; CHECK:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   t2Bcc %bb.2, 1 /* CC::ne */, killed $cpsr
-  ; CHECK: bb.1.b2:
-  ; CHECK:   successors: %bb.3(0x80000000)
-  ; CHECK:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
-  ; CHECK:   t2B %bb.3, 14 /* CC::al */, $noreg
-  ; CHECK: bb.2.b3:
-  ; CHECK:   successors: %bb.3(0x80000000)
-  ; CHECK:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
-  ; CHECK:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK: bb.3.b5:
-  ; CHECK:   liveins: $r0
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
-  ; CHECK:   tBX_RET 0 /* CC::eq */, killed $cpsr
-  ; CHECK:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
+  ; CHECK-V7-LABEL: name: test_nosize
+  ; CHECK-V7: bb.0 (%ir-block.0):
+  ; CHECK-V7:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
+  ; CHECK-V7:   liveins: $lr, $r7
+  ; CHECK-V7:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   tTAILJMPdND @extfunc, 1 /* CC::ne */, killed $cpsr, implicit $sp, implicit $sp
+  ; CHECK-V7:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION offset $r7, -8
+  ; CHECK-V7:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   t2Bcc %bb.2, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V7: bb.1.b2:
+  ; CHECK-V7:   successors: %bb.3(0x80000000)
+  ; CHECK-V7:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
+  ; CHECK-V7:   t2B %bb.3, 14 /* CC::al */, $noreg
+  ; CHECK-V7: bb.2.b3:
+  ; CHECK-V7:   successors: %bb.3(0x80000000)
+  ; CHECK-V7:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
+  ; CHECK-V7:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7: bb.3.b5:
+  ; CHECK-V7:   liveins: $r0
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
+  ; CHECK-V7:   tBX_RET 0 /* CC::eq */, killed $cpsr
+  ; CHECK-V7:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
+  ; CHECK-V8-LABEL: name: test_nosize
+  ; CHECK-V8: bb.0 (%ir-block.0):
+  ; CHECK-V8:   successors: %bb.1(0x50000000), %bb.6(0x30000000)
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.1.b1:
+  ; CHECK-V8:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
+  ; CHECK-V8:   liveins: $r7, $lr
+  ; CHECK-V8:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION offset $r7, -8
+  ; CHECK-V8:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.2.b2:
+  ; CHECK-V8:   successors: %bb.4(0x80000000)
+  ; CHECK-V8:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
+  ; CHECK-V8:   t2B %bb.4, 14 /* CC::al */, $noreg
+  ; CHECK-V8: bb.3.b3:
+  ; CHECK-V8:   successors: %bb.4(0x80000000)
+  ; CHECK-V8:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
+  ; CHECK-V8:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8: bb.4.b5:
+  ; CHECK-V8:   successors: %bb.5(0x30000000), %bb.6(0x50000000)
+  ; CHECK-V8:   liveins: $r0
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
+  ; CHECK-V8:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.5.b8:
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   tBX_RET 14 /* CC::al */, $noreg
+  ; CHECK-V8: bb.6.b7:
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
   bb.0 (%ir-block.0):
     successors: %bb.1(0x50000000), %bb.6(0x30000000)
     liveins: $lr, $r7
@@ -277,43 +315,80 @@ callSites:       []
 constants:       []
 machineFunctionInfo: {}
 body:             |
-  ; CHECK-LABEL: name: test_optsize
-  ; CHECK: bb.0 (%ir-block.0):
-  ; CHECK:   successors: %bb.1(0x50000000), %bb.6(0x30000000)
-  ; CHECK:   liveins: $lr, $r7
-  ; CHECK:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
-  ; CHECK: bb.1.b1:
-  ; CHECK:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
-  ; CHECK:   liveins: $r7, $lr
-  ; CHECK:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
-  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
-  ; CHECK:   frame-setup CFI_INSTRUCTION offset $lr, -4
-  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r7, -8
-  ; CHECK:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
-  ; CHECK: bb.2.b2:
-  ; CHECK:   successors: %bb.4(0x80000000)
-  ; CHECK:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
-  ; CHECK:   t2B %bb.4, 14 /* CC::al */, $noreg
-  ; CHECK: bb.3.b3:
-  ; CHECK:   successors: %bb.4(0x80000000)
-  ; CHECK:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
-  ; CHECK:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK: bb.4.b5:
-  ; CHECK:   successors: %bb.5(0x30000000), %bb.6(0x50000000)
-  ; CHECK:   liveins: $r0
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
-  ; CHECK:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
-  ; CHECK: bb.5.b8:
-  ; CHECK:   liveins: $lr, $r7
-  ; CHECK:   tBX_RET 14 /* CC::al */, $noreg
-  ; CHECK: bb.6.b7:
-  ; CHECK:   liveins: $lr, $r7
-  ; CHECK:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
+  ; CHECK-V7-LABEL: name: test_optsize
+  ; CHECK-V7: bb.0 (%ir-block.0):
+  ; CHECK-V7:   successors: %bb.1(0x50000000), %bb.6(0x30000000)
+  ; CHECK-V7:   liveins: $lr, $r7
+  ; CHECK-V7:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V7: bb.1.b1:
+  ; CHECK-V7:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
+  ; CHECK-V7:   liveins: $r7, $lr
+  ; CHECK-V7:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION offset $r7, -8
+  ; CHECK-V7:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V7: bb.2.b2:
+  ; CHECK-V7:   successors: %bb.4(0x80000000)
+  ; CHECK-V7:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
+  ; CHECK-V7:   t2B %bb.4, 14 /* CC::al */, $noreg
+  ; CHECK-V7: bb.3.b3:
+  ; CHECK-V7:   successors: %bb.4(0x80000000)
+  ; CHECK-V7:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
+  ; CHECK-V7:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7: bb.4.b5:
+  ; CHECK-V7:   successors: %bb.5(0x30000000), %bb.6(0x50000000)
+  ; CHECK-V7:   liveins: $r0
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
+  ; CHECK-V7:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V7: bb.5.b8:
+  ; CHECK-V7:   liveins: $lr, $r7
+  ; CHECK-V7:   tBX_RET 14 /* CC::al */, $noreg
+  ; CHECK-V7: bb.6.b7:
+  ; CHECK-V7:   liveins: $lr, $r7
+  ; CHECK-V7:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
+  ; CHECK-V8-LABEL: name: test_optsize
+  ; CHECK-V8: bb.0 (%ir-block.0):
+  ; CHECK-V8:   successors: %bb.1(0x50000000), %bb.6(0x30000000)
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.1.b1:
+  ; CHECK-V8:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
+  ; CHECK-V8:   liveins: $r7, $lr
+  ; CHECK-V8:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION offset $r7, -8
+  ; CHECK-V8:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.2.b2:
+  ; CHECK-V8:   successors: %bb.4(0x80000000)
+  ; CHECK-V8:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
+  ; CHECK-V8:   t2B %bb.4, 14 /* CC::al */, $noreg
+  ; CHECK-V8: bb.3.b3:
+  ; CHECK-V8:   successors: %bb.4(0x80000000)
+  ; CHECK-V8:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
+  ; CHECK-V8:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8: bb.4.b5:
+  ; CHECK-V8:   successors: %bb.5(0x30000000), %bb.6(0x50000000)
+  ; CHECK-V8:   liveins: $r0
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
+  ; CHECK-V8:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.5.b8:
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   tBX_RET 14 /* CC::al */, $noreg
+  ; CHECK-V8: bb.6.b7:
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
   bb.0 (%ir-block.0):
     successors: %bb.1(0x50000000), %bb.6(0x30000000)
     liveins: $lr, $r7
@@ -408,43 +483,80 @@ callSites:       []
 constants:       []
 machineFunctionInfo: {}
 body:             |
-  ; CHECK-LABEL: name: test_minsize
-  ; CHECK: bb.0 (%ir-block.0):
-  ; CHECK:   successors: %bb.1(0x50000000), %bb.6(0x30000000)
-  ; CHECK:   liveins: $lr, $r7
-  ; CHECK:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
-  ; CHECK: bb.1.b1:
-  ; CHECK:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
-  ; CHECK:   liveins: $r7, $lr
-  ; CHECK:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
-  ; CHECK:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
-  ; CHECK:   frame-setup CFI_INSTRUCTION offset $lr, -4
-  ; CHECK:   frame-setup CFI_INSTRUCTION offset $r7, -8
-  ; CHECK:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
-  ; CHECK: bb.2.b2:
-  ; CHECK:   successors: %bb.4(0x80000000)
-  ; CHECK:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
-  ; CHECK:   t2B %bb.4, 14 /* CC::al */, $noreg
-  ; CHECK: bb.3.b3:
-  ; CHECK:   successors: %bb.4(0x80000000)
-  ; CHECK:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
-  ; CHECK:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
-  ; CHECK: bb.4.b5:
-  ; CHECK:   successors: %bb.5(0x30000000), %bb.6(0x50000000)
-  ; CHECK:   liveins: $r0
-  ; CHECK:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
-  ; CHECK:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
-  ; CHECK:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
-  ; CHECK: bb.5.b8:
-  ; CHECK:   liveins: $lr, $r7
-  ; CHECK:   tBX_RET 14 /* CC::al */, $noreg
-  ; CHECK: bb.6.b7:
-  ; CHECK:   liveins: $lr, $r7
-  ; CHECK:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
+  ; CHECK-V7-LABEL: name: test_minsize
+  ; CHECK-V7: bb.0 (%ir-block.0):
+  ; CHECK-V7:   successors: %bb.1(0x50000000), %bb.6(0x30000000)
+  ; CHECK-V7:   liveins: $lr, $r7
+  ; CHECK-V7:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V7: bb.1.b1:
+  ; CHECK-V7:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
+  ; CHECK-V7:   liveins: $r7, $lr
+  ; CHECK-V7:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK-V7:   frame-setup CFI_INSTRUCTION offset $r7, -8
+  ; CHECK-V7:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V7: bb.2.b2:
+  ; CHECK-V7:   successors: %bb.4(0x80000000)
+  ; CHECK-V7:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
+  ; CHECK-V7:   t2B %bb.4, 14 /* CC::al */, $noreg
+  ; CHECK-V7: bb.3.b3:
+  ; CHECK-V7:   successors: %bb.4(0x80000000)
+  ; CHECK-V7:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
+  ; CHECK-V7:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V7: bb.4.b5:
+  ; CHECK-V7:   successors: %bb.5(0x30000000), %bb.6(0x50000000)
+  ; CHECK-V7:   liveins: $r0
+  ; CHECK-V7:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V7:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
+  ; CHECK-V7:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V7: bb.5.b8:
+  ; CHECK-V7:   liveins: $lr, $r7
+  ; CHECK-V7:   tBX_RET 14 /* CC::al */, $noreg
+  ; CHECK-V7: bb.6.b7:
+  ; CHECK-V7:   liveins: $lr, $r7
+  ; CHECK-V7:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
+  ; CHECK-V8-LABEL: name: test_minsize
+  ; CHECK-V8: bb.0 (%ir-block.0):
+  ; CHECK-V8:   successors: %bb.1(0x50000000), %bb.6(0x30000000)
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   renamable $r0 = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.1.b1:
+  ; CHECK-V8:   successors: %bb.3(0x40000000), %bb.2(0x40000000)
+  ; CHECK-V8:   liveins: $r7, $lr
+  ; CHECK-V8:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r7, killed $lr
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION offset $lr, -4
+  ; CHECK-V8:   frame-setup CFI_INSTRUCTION offset $r7, -8
+  ; CHECK-V8:   renamable $r0 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   t2Bcc %bb.3, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.2.b2:
+  ; CHECK-V8:   successors: %bb.4(0x80000000)
+  ; CHECK-V8:   tBL 14 /* CC::al */, $noreg, @extfunc, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def $r0
+  ; CHECK-V8:   t2B %bb.4, 14 /* CC::al */, $noreg
+  ; CHECK-V8: bb.3.b3:
+  ; CHECK-V8:   successors: %bb.4(0x80000000)
+  ; CHECK-V8:   renamable $r0 = t2LDRi12 undef renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from `i32* undef`)
+  ; CHECK-V8:   renamable $r0 = t2ANDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+  ; CHECK-V8: bb.4.b5:
+  ; CHECK-V8:   successors: %bb.5(0x30000000), %bb.6(0x50000000)
+  ; CHECK-V8:   liveins: $r0
+  ; CHECK-V8:   t2CMPri killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
+  ; CHECK-V8:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r7, def $lr
+  ; CHECK-V8:   t2Bcc %bb.6, 1 /* CC::ne */, killed $cpsr
+  ; CHECK-V8: bb.5.b8:
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   tBX_RET 14 /* CC::al */, $noreg
+  ; CHECK-V8: bb.6.b7:
+  ; CHECK-V8:   liveins: $lr, $r7
+  ; CHECK-V8:   tTAILJMPdND @extfunc, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp
   bb.0 (%ir-block.0):
     successors: %bb.1(0x50000000), %bb.6(0x30000000)
     liveins: $lr, $r7

diff  --git a/llvm/test/CodeGen/ARM/ifcvt-size.mir b/llvm/test/CodeGen/ARM/ifcvt-size.mir
index 9730b654156d..caa1d356f816 100644
--- a/llvm/test/CodeGen/ARM/ifcvt-size.mir
+++ b/llvm/test/CodeGen/ARM/ifcvt-size.mir
@@ -1,4 +1,5 @@
-# RUN: llc %s -o - -run-pass=if-converter -debug-only=if-converter 2>%t| FileCheck %s
+# RUN: llc -mtriple=thumbv8a-unknown-linux-gnueabi %s -o - -run-pass=if-converter -debug-only=if-converter | FileCheck %s
+# RUN: llc -mtriple=thumbv7-unknown-linux-gnueabi %s -o - -run-pass=if-converter -debug-only=if-converter 2>%t| FileCheck %s
 # RUN: FileCheck %s < %t --check-prefix=DEBUG
 # REQUIRES: asserts
 
@@ -9,7 +10,6 @@
 # instructions, and selection of the CB(N)Z instructions.
 
 --- |
-  target triple = "thumbv7-unknown-linux-gnueabi"
 
   define void @fn1() minsize {
   entry:


        


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