[PATCH] D85454: [ARM] Allow vecreduce_add in tail predicated loops

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

> After the rewrite of this pass to use activelanemask, that's essentially all there's left here

Yep, that's the idea, but taking it further. The pass currently starts off by finding set_loop_iterations hardware loop intrinsics, then searches through for masked load/stores (but doesn't check for normal loads/stores) and then can get held up by other intrinsics like the reductions fixed here. Not much of that is really beneficial and the whole pass could simply be converting active lane masks to vctp's. As in I think that is often better even if you don't produce a tail predicated loop at the end of it.

Although I'm not sure how much it would help in the grand scheme of things. If we are in the state where we have a active lane mask but don't for whatever reason produce a tail predicated loop, the codegen is going to be pretty bad either way.


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  https://reviews.llvm.org/D85454/new/

https://reviews.llvm.org/D85454