[llvm] d3153b5 - [X86] Remove a DCI.isBeforeLegalize() call from combineVSelectWithAllOnesOrZeros.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2020-08-08T14:19:13-07:00
New Revision: d3153b5ca29b80d73af449727ca557eb6ccbd973

URL: https://github.com/llvm/llvm-project/commit/d3153b5ca29b80d73af449727ca557eb6ccbd973
DIFF: https://github.com/llvm/llvm-project/commit/d3153b5ca29b80d73af449727ca557eb6ccbd973.diff

LOG: [X86] Remove a DCI.isBeforeLegalize() call from combineVSelectWithAllOnesOrZeros.

This was blocking isTypeLegal call so that we could do a particular
transform on illegal types before type legalization. But the we
create a target specific node using that type. We shouldn't do
that if the type isn't legal. So I think we should just always
make sure the type is legal.

I suspect that in order to get the condition VT to not be a vector
of i1 we already completed type legalization anyway so this probably
doesn't matter much in practice.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 0056b392705b..42bb03be877c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -39608,7 +39608,7 @@ combineVSelectWithAllOnesOrZeros(SDNode *N, SelectionDAG &DAG,
   if (TValIsAllOnes && FValIsAllZeros)
     return DAG.getBitcast(VT, Cond);
 
-  if (!DCI.isBeforeLegalize() && !TLI.isTypeLegal(CondVT))
+  if (!TLI.isTypeLegal(CondVT))
     return SDValue();
 
   // vselect Cond, 111..., X -> or Cond, X