[PATCH] D85546: [SVE] Add ISD nodes for integer extend inreg operations.

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 7 18:15:52 PDT 2020


paulwalker-arm updated this revision to Diff 284108.
paulwalker-arm added a comment.

Changed new nodes to SIGN/ZERO_EXTEND_INREG_MERGE_PATHRU that closer resemble SIGN_EXTEND_INREG but using a predicate and passthru positioned as required by _MERGE_PATHRU style nodes.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85546/new/

https://reviews.llvm.org/D85546

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td

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