[PATCH] D85546: [SVE] Add ISD nodes for integer extend inreg operations.

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm created this revision.
Herald added subscribers: llvm-commits, psnobl, hiraditya, tschuett.
Herald added a reviewer: efriedma.
Herald added a project: LLVM.
paulwalker-arm requested review of this revision.

These are useful instructions when lowering fixed length vector
extends, so I've broken this patch out as kind of NFC like work.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D85546

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td

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