[PATCH] D84324: AMDGPU/GlobalISel: Lower G_FREM

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:703-705
+  getActionDefinitionsBuilder(G_FREM)
+    .customFor({S16, S32, S64})
+    .scalarize(0);
----------------
arsenm wrote:
> foad wrote:
> > Does this need to be conditional on ST.has16BitInsts ?
> It doesn't strictly have to be, but it would produce a better result to force promotion to 32-bit first
I assume Matt meant to force promotion to 32-bit first //if// the subtarget doesn't have 16-bit instructions. Compared to the previous version of your patch, the code for fast_frem_f16 has got better for CI but worse for VI.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84324/new/

https://reviews.llvm.org/D84324