[PATCH] D85463: [GlobalISel] Add combine for (x & mask) -> x when (x & mask) == x
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 6 14:40:54 PDT 2020
paquette added a comment.
Also yeah, it looks like this is handled in `SelectionDAG::GetDemandedBits`:
case ISD::AND: {
// X & -1 -> X (ignoring bits which aren't demanded).
// Also handle the case where masked out bits in X are known to be zero.
if (ConstantSDNode *RHSC = isConstOrConstSplat(V.getOperand(1))) {
const APInt &AndVal = RHSC->getAPIntValue();
if (DemandedBits.isSubsetOf(AndVal) ||
DemandedBits.isSubsetOf(computeKnownBits(V.getOperand(0)).Zero |
AndVal))
return V.getOperand(0);
}
So I guess that it might make sense to partially move this into GISelKnownBits.
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https://reviews.llvm.org/D85463/new/
https://reviews.llvm.org/D85463
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