[PATCH] D85463: [GlobalISel] Add combine for (x & mask) -> x when (x & mask) == x
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 6 12:30:08 PDT 2020
arsenm added a comment.
Where is this handled in DAGCombiner? I don't see anything directly matching this; is this one of the cases that SimplifyDemandedBits handles more generally? The closest looking thing after skimming is this:
// if (and x, c) is known to be zero, return 0
unsigned BitWidth = VT.getScalarSizeInBits();
if (N1C && DAG.MaskedValueIsZero(SDValue(N, 0),
APInt::getAllOnesValue(BitWidth)))
return DAG.getConstant(0, SDLoc(N), VT);
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D85463/new/
https://reviews.llvm.org/D85463
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