[PATCH] D85374: AMDGPU: Remove ATOMIC_PK_FADD
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 5 16:42:17 PDT 2020
arsenm created this revision.
arsenm added a reviewer: rampitec.
Herald added subscribers: kerbowa, jfb, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
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arsenm requested review of this revision.
Herald added a subscriber: wdng.
The f32 and v2f16 cases should be handled the same way.
https://reviews.llvm.org/D85374
Files:
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Index: llvm/lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -7543,14 +7543,9 @@
Op.getOperand(2), // ptr
Op.getOperand(3) // vdata
};
- EVT VT = Op.getOperand(3).getValueType();
+ EVT VT = Op.getOperand(3).getValueType();
auto *M = cast<MemSDNode>(Op);
- if (VT.isVector()) {
- return DAG.getMemIntrinsicNode(
- AMDGPUISD::ATOMIC_PK_FADD, DL, Op->getVTList(), Ops, VT,
- M->getMemOperand());
- }
return DAG.getAtomic(ISD::ATOMIC_LOAD_FADD, DL, VT,
DAG.getVTList(VT, MVT::Other), Ops,
Index: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
+++ llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
@@ -536,7 +536,6 @@
BUFFER_ATOMIC_CMPSWAP,
BUFFER_ATOMIC_CSUB,
BUFFER_ATOMIC_FADD,
- ATOMIC_PK_FADD,
LAST_AMDGPU_ISD_NUMBER
};
Index: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -4371,7 +4371,6 @@
NODE_NAME_CASE(BUFFER_ATOMIC_CMPSWAP)
NODE_NAME_CASE(BUFFER_ATOMIC_CSUB)
NODE_NAME_CASE(BUFFER_ATOMIC_FADD)
- NODE_NAME_CASE(ATOMIC_PK_FADD)
case AMDGPUISD::LAST_AMDGPU_ISD_NUMBER: break;
}
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