[PATCH] D85220: [CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize

[Kerry McLaughlin via Phabricator via llvm-commits]

kmclaughlin updated this revision to Diff 283256.
kmclaughlin retitled this revision from "[CodeGen] Refactor getMemBasePlusOffset to accept a TypeSize" to "[CodeGen] Refactor getMemBasePlusOffset & getObjectPtrOffset to accept a TypeSize".
kmclaughlin edited the summary of this revision.
kmclaughlin added a comment.
Herald added subscribers: kerbowa, kbarton, nhaehnle, jvesely, nemanjai, arsenm.

- Additionally refactored getObjectPtrOffset to accept a TypeSize as the Offset argument


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D85220/new/

https://reviews.llvm.org/D85220

Files:
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
  llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp

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