[PATCH] D77152: [SelectionDAG] Better legalization for FSHL and FSHR

[Jay Foad via Phabricator via llvm-commits]

foad updated this revision to Diff 283190.
foad added a comment.

RISCV updates to avoid code quality regressions from changes in the way funnel shifts are lowered.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77152/new/

https://reviews.llvm.org/D77152

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
  llvm/lib/Target/RISCV/RISCVInstrInfoB.td
  llvm/test/CodeGen/AArch64/funnel-shift-rot.ll
  llvm/test/CodeGen/AArch64/funnel-shift.ll
  llvm/test/CodeGen/AArch64/shift-by-signext.ll
  llvm/test/CodeGen/AMDGPU/fshl.ll
  llvm/test/CodeGen/AMDGPU/fshr.ll
  llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll
  llvm/test/CodeGen/PowerPC/funnel-shift.ll
  llvm/test/CodeGen/RISCV/rv32Zbbp.ll
  llvm/test/CodeGen/RISCV/rv32Zbt.ll
  llvm/test/CodeGen/RISCV/rv64Zbbp.ll
  llvm/test/CodeGen/RISCV/rv64Zbt.ll
  llvm/test/CodeGen/X86/fshl.ll
  llvm/test/CodeGen/X86/fshr.ll
  llvm/test/CodeGen/X86/funnel-shift.ll
  llvm/test/CodeGen/X86/vector-fshl-128.ll
  llvm/test/CodeGen/X86/vector-fshl-256.ll
  llvm/test/CodeGen/X86/vector-fshl-512.ll
  llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
  llvm/test/CodeGen/X86/vector-fshr-128.ll
  llvm/test/CodeGen/X86/vector-fshr-256.ll
  llvm/test/CodeGen/X86/vector-fshr-512.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
  llvm/test/CodeGen/X86/vector-fshr-rot-512.ll