[PATCH] D85117: [SVE] Add lowering for fixed length vector and, or & xor operations.
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 5 03:31:05 PDT 2020
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG927fc536ca22: [SVE] Add lowering for fixed length vector and, or & xor operations. (authored by paulwalker-arm).
Changed prior to commit:
https://reviews.llvm.org/D85117?vs=282568&id=283186#toc
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D85117/new/
https://reviews.llvm.org/D85117
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h
llvm/test/CodeGen/AArch64/sve-fixed-length-int-log.ll
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