[PATCH] D81172: [AMDGPU] Implement hardware bug workaround for image instructions
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 4 19:30:40 PDT 2020
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:3286
+ return B.buildBuildVector(LLT::vector(2, S32), PackedRegs).getReg(0);
+ } else if (StoreVT.getNumElements() == 3) {
+ SmallVector<Register, 4> PackedRegs;
----------------
No else after return
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:3301
+ PackedRegs.resize(4, B.buildUndef(S32).getReg(0));
+ return B.buildBuildVector(LLT::vector(4, S32), PackedRegs).getReg(0);
+ } else {
----------------
No else after return
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:3303
+ } else {
+ assert(false && "Data type not supported");
+ }
----------------
llvm_unreachable instead of assert(alse)
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp:197
+ HasVGPRIndexMode(false), HasScalarStores(false), HasScalarAtomics(false),
+ HasSDWAOmod(false), HasSDWAScalar(false), HasSDWASdst(false),
+ HasSDWAMac(false), HasSDWAOutModsVOPC(false), HasDPP(false),
----------------
I know clang-format really wants to pack these onto a single line, but it's a terrible idea and you shouldn't listen to it
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81172/new/
https://reviews.llvm.org/D81172
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